PAL AND PLA DEVICES
Presently, programmable array logic (PAL) devices, and programmable logic array (PLA) devices find application for controlling digital circuitry, such as in "state machines" or sequencers, requiring flexibility and ease of use. Although such PAL/PLA devices operate with speed and flexibility, they are difficult to program, since they require writing complex Boolean expressions for this purpose. The use of Boolean equations to design the sequencer limits the number of variables available to the designer, typically from eight to sixteen, because of the mathematical difficulties in specifying and simplifying equations having more than eight variables. Moreover, such sequencers require additional external circuitry to provide flexibility as well as additional conditional testing circuitry.
Particular difficulty is encountered when programming and understanding a general PAL or PLA device used to perform higher level logical functions such as counting, state sequencing, branching, or multiple-case testing. No higher level logic blocks, such as program counters, last-in, first-out (LIFO) stacks or memories are available in such devices which can be readily programmed or easily understood. Subroutines are a highly-desirable high level language construct, as will be appreciated by those skilled in the art, and provision of a stack affords easy subroutine capability in a control or sequencer program. Omission of a stack means that PAL/PLA-based devices cannot readily support the high level language GOSUB and RETURN constructs. The absence of these higher level elements makes it very difficult to implement sequencers and state machines with high level language-based state machine constructs with PALs and PLAs. Also, lack of these high level elements makes current PAL/PLA device architecture unoptimized for control logic applications.
While to reduce programming effort and to ease understandability, some higher level language (HLL) programming schemes maybe available, there is no direct relationship between such HLL constructs and the underlying hardware. As such, no methodology is available which affords easy design of the microsequencer because no high level constructs are available within the PAL- or PLA-based sequencers corresponding to the high level language constructs most useful to design personnel. Complex, detailed and error-prone Boolean equations must be written presently to accomplish the design of PAL- or PLA-based sequencers and such equations do not bear a one-to-one correspondence to the underlying circuit elements of the PAL- or PLA-based sequencer. Because of all these reasons, PAL/PLA devices are not used for large complex control applications.